The semiconductor industry has experienced rapid growth due to improvements in the integration density of a variety of electronic components (e.g., transistors, diodes, resistors, capacitors, etc.). For the most part, this improvement in integration density has come from shrinking the semiconductor process node (e.g., shrinking the process node towards the sub-20 nm node). As device dimensions shrink, voltage nodes also shrink, with modern core device voltages trending toward less than 1 Volt, and input/output (I/O) device voltages under 2 Volts.
Non-volatile memory (NVM), a type of memory that retains stored data in both powered and unpowered states, is often embedded in complementary metal-oxide-semiconductor (CMOS) logic processes, and typically requires high programming voltage for operation. In many NVM applications, a word line (WL) decoder drives high voltage on a word line for programming, and low voltage on the word line for reading. In one time programmable (OTP) NVM, the high voltage is only available when the NVM is programmed (e.g., at the factory), and the low voltage is available during programming and in the final product.